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RX-MODEL

Rhonexum introduces the RX-Model — a SPICE-compatible compact model built specifically for cryogenic circuit simulation.

While traditional models struggle at ultra-low temperatures, relying on bloated room-temperature frameworks with hundreds of parameters, the RX-Model sets a new standard: fast, stable, and cryo-native.
Chip.16mm^2
422mm^2Coin .
● A tiny chip like this can have massive costs and delay. in ourdays, a fabrication cycle can take up to $25k per mm2 in 8 months.
Conventional circuit design processes rely on multiple physical iterations before reaching a functional prototype.

Each design adjustment requires new manufacturing runs and testing cycles, extending timelines and significantly increasing costs. Without accurate simulation, teams work in the dark — refining through trial and error rather than predictive insight. This iterative loop delays innovation and reduces efficiency across the entire development pipeline.
0%
of the designs fail on the first try.
That’s where we start.

fewer chips.
less cash.
faster results.

Existing Solutions
Rhonexum Logotype.
10 manufacturing runs
1 manufacturing run
80 months
8 months
$2M
$200K
90% Time & Cost reduction
Existing Solutions
10 manufacturing runs
80 months
$2M
Rhonexum Logotype.
1 manufacturing run
8 months
$200K
90% Time & Cost reduction
Engineered with a physics-based, semi-empirical approach and advanced normalization techniques, RX-Model delivers robust, numerically stable simulations across cryogenic regimes. It’s technology-agnostic, working seamlessly with various CMOS processes.

Unlike conventional tools, RX-Model captures key cryogenic effects — like quantum transport — without convergence issues. It uses significantly fewer parameters, is deployable in days, and plugs effortlessly into both commercial and open-source platforms.
Simulation at -270ºC Accuracy Benchmark
(X)   gate voltage  (AU)
(Y)   DRAIN CURRENT LOG SCALE  (AU)
(X)   gate voltage  (AU)
(Y)   DRAIN CURRENT LOG SCALE  (AU)
0.0%
Simulation Accuracy at -270ºC
0.0%
Simulation Accuracy at -270ºC

currently adapted for

Our experience with these technologies has been instrumental in the development of the libraries.
GF
22 nm FDSOI
ST
28 nm FDSOI
TSMC
28 nm Bulk
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[ MANUFACTURING PROCESS ]
[ CHIP DESIGN ]
[ RX-MODEL ]
[ MANUFACTURING PROCESS ]
[ CHIP DESIGN ]